Week 4 Self Assessment Quiz Questions 1.[2] What precaution must be taken with PORTB bit zero in regards to master mode SPI operation? 2.[3] What do we mean by "full-duplex, synchronous serial data transfer"? 3.[2] When operating in master mode, how does the master read data from a slave device? 4.[2] When sharing the SPI port with other peripherals on the mega128 board, why doesn't the LCD get written with random data? 5.[3] The 74HC595 has a second set of output registers. Why is this a very convenient feature for an interface such as SPI? 6.[3] When two areas in your code both use the SPI unit, what precautions must be taken? 7.[2] Relative to a flip-flop, what is: -setup time -hold time 8.[8] You are writing a function that sends and receives one byte on SPI. The argument for the function call is the byte to send. The value returned by the function is the byte received. Show the C code that would implement such a function. /***********************************************************************/ // spi_tx_rx //Sends and receives one data byte to the SPI port. Byte to send is the //calling argument. Byte received is returned by the function. Chip select //on the slave is active low and is connected to port F bit 2. /***********************************************************************/ void spi_tx_rx(uint8_t in_data){ } //spi_tx_rx 9.[8] The SPI interface is a 8-bit peripheral. Often however, the slave peripheral is a 16-bit device. How would you most efficiently transfer a consecutive 16-bit data word to such a device? Give a verbal explanation and timing diagram showing SCK, MOSI, and SS_N. Assume the slave acquires data on the rising edge of SCK. 1-------------------------------------------------------------------------- SCK 0-------------------------------------------------------------------------- 1-------------------------------------------------------------------------- MOSI 0-------------------------------------------------------------------------- 1-------------------------------------------------------------------------- SS_N 0-------------------------------------------------------------------------- 10.[9] The 74HC164 is a 8-bit, serial-in, parallel-out shift register like the 74HC595 but without the second set of output registers. Show how you would connect it to the AVR's SPI port so that 8 bit data can be shifted into the shift register. You must consider that other devices are using the SPI interface also and they must not interfere with your shift register at all. You may use additional logic gates as necessary. Don't be concerned about resetting the shift register. 11.[2] What is the most special thing about timer/counter0? 12.[2] Why are control register writes delayed when running TCNT0 at 32khz? 13.[2] Assume TCNT0 is running from 32k Why are control register writes delayed when running TCNT0 at 32khz? 14.[2] Assume TCNT0 is running from a 32.768Khz clock in CTC mode. If prescaling is set to divide by 2, and the compare register is set to 0x20, if interrupts are set, how often will the interrupts occur? 15.[2] If TCNT0 is running in interrupt mode, how is the interrupt flag cleared? 16.[2] In what applications would using a timer be more appropriate than a software loop. Where would a software loop be a better solution? 17.[4] Suppose we have an application where the main program must respond to a timer overflow in the fastest possible manner. How approach would you take to do this? 18.[4] If you needed to toggle an external pin due to the result of an output comparison, what approach would be most efficient? 19.[2] What is the source for the 32.768Khz clock? 20.[2] Why can controlling the speed of a DC motor via PWM be so efficient as compared to varying the voltage to the motor in a continuous fashion? 21.[2] What counter/timer mode should I use if keeping a constant duty cycle to an external pin is important while frequency is varied? 22.[2] What counter/timer mode should I use if keeping a constant frequency to an external pin is important while varying the duty cycle?